PIC16C717 | ||||
---|---|---|---|---|
CONFIG (address:0x2007, mask:0x3F7F, default:0x3F7F) | ||||
FOSC -- Oscillator selection bits (bitmask:0x0007) | ||||
FOSC = LP | 0x3FF8 | LP oscillator. | ||
FOSC = XT | 0x3FF9 | XT oscillator. | ||
FOSC = HS | 0x3FFA | HS oscillator. | ||
FOSC = EXTCLK | 0x3FFB | EC I/O. | ||
FOSC = INTRCIO | 0x3FFC | INTRC, OSC2 is I/O. | ||
FOSC = INTRCCLK | 0x3FFD | INTRC, clockout on OSC2. | ||
FOSC = ER_NOCLKOUT | 0x3FFE | ER I/O. | ||
FOSC = ER_CLKOUT | 0x3FFF | ER CLKOUT. | ||
WDTE -- Watchdog Timer Enable bit (bitmask:0x0008) | ||||
WDTE = OFF | 0x3FF7 | WDT disabled. | ||
WDTE = ON | 0x3FFF | WDT enabled. | ||
PWRTE -- Power-up Timer Enable bit (bitmask:0x0010) | ||||
PWRTE = ON | 0x3FEF | PWRT enabled. | ||
PWRTE = OFF | 0x3FFF | PWRT disabled. | ||
MCLRE -- Master Clear Enable (bitmask:0x0020) | ||||
MCLRE = OFF | 0x3FDF | Internal. | ||
MCLRE = ON | 0x3FFF | External. | ||
BOREN -- Brown-out Reset Enable bit (bitmask:0x0040) | ||||
BOREN = OFF | 0x3FBF | BOR disabled. | ||
BOREN = ON | 0x3FFF | BOR enabled. | ||
BODENV -- Brown Out Voltage (bitmask:0x0C00) | ||||
BODENV = 45 | 0x33FF | VBOR set to 4.5V. | ||
BODENV = 42 | 0x37FF | VBOR set to 4.2V. | ||
BODENV = 27 | 0x3BFF | VBOR set to 2.7V. | ||
BODENV = 25 | 0x3FFF | VBOR set to 2.5V. | ||
CP -- Code Protecton bit (bitmask:0x3300) | ||||
CP = ALL | 0x0CFF | All memory is code protected. | ||
CP = OFF | 0x3FFF | Code protection off. |
This page generated automatically by the device-help.pl program (2017-05-13 09:29:46 UTC) from the 8bit_device.info file (rev: 1.36) of mpasmx and from the gputils source package (rev: svn 1308). The mpasmx is included in the MPLAB X.