All Enhanced Extended Regular 12 bits 14 bits 16 bits RAM
size
ROM
size
EEPROM
size
Common
SFRs
Features Configuration Bits RAM map SFR map
PIC16C765
CONFIG (address:0x2007, mask:0x3F3F, default:0x3F3F)
FOSC -- Oscillator selection bits (bitmask:0x0003)
FOSC = HS 0x3FFC HS oscillator.
FOSC = EC 0x3FFD External clock. CLKOUT on OSC2 pin.
FOSC = H4 0x3FFE HS osc with 4x PLL enabled.
FOSC = E4 0x3FFF External clock with 4x PLL enabled. CLKOUT on OSC2 pin.
WDTE -- Watchdog Timer Enable bit (bitmask:0x0004)
WDTE = OFF 0x3FFB WDT disabled.
WDTE = ON 0x3FFF WDT enabled.
PWRTE -- Power-up Timer Enable bit (bitmask:0x0008)
PWRTE = ON 0x3FF7 PWRT enabled.
PWRTE = OFF 0x3FFF PWRT disabled.
CP -- Code Protection bits (bitmask:0x3F30)
CP = ALL 0x00CF All memory is code protected.
CP = 75 0x15DF 0800h-1FFFh code protected.
CP = 50 0x2AEF 1000h-1FFFh code protected.
CP = OFF 0x3FFF Code protection off.

This page generated automatically by the device-help.pl program (2017-05-13 09:29:46 UTC) from the 8bit_device.info file (rev: 1.36) of mpasmx and from the gputils source package (rev: svn 1308). The mpasmx is included in the MPLAB X.