All Enhanced Extended Regular 12 bits 14 bits 16 bits RAM
size
ROM
size
EEPROM
size
Common
SFRs
Features Configuration Bits RAM map SFR map
PIC16F505
CONFIG (address:0x0FFF, mask:0x003F, default:0x003F)
OSC -- Oscillator Selection bits (bitmask:0x0007)
OSC = LP 0x0FF8 LP oscillator.
OSC = XT 0x0FF9 XT oscillator.
OSC = HS 0x0FFA HS oscillator.
OSC = EC 0x0FFB EC oscillator/RB4 function on RB4/OSC2/CLKOUT pin.
OSC = IntRC_RB4EN 0x0FFC Internal RC oscillator/RB4 function on RB4/OSC2/CLKOUT pin.
OSC = IntRC_CLKOUTEN 0x0FFD Internal RC oscillator/CLKOUT function on RB4/OSC2/CLKOUT pin.
OSC = ExtRC_RB4EN 0x0FFE External RC oscillator/RB4 function on RB4/OSC2/CLKOUT pin.
OSC = ExtRC_CLKOUTEN 0x0FFF External RC oscillator/CLKOUT function on RB4/OSC2/CLKOUT pin.
WDT -- Watchdog Timer Enable bit (bitmask:0x0008)
WDT = OFF 0x0FF7 WDT disabled.
WDT = ON 0x0FFF WDT enabled.
CP -- Code Protection bit (bitmask:0x0010)
CP = ON 0x0FEF Code protection on.
CP = OFF 0x0FFF Code protection off.
MCLRE -- RB3/MCLR Pin Function Select bit (bitmask:0x0020)
MCLRE = OFF 0x0FDF GP3/MCLR pin function is digital input, MCLR internally tied to VDD.
MCLRE = ON 0x0FFF RB3/MCLR pin function is MCLR.

This page generated automatically by the device-help.pl program (2017-05-13 09:29:46 UTC) from the 8bit_device.info file (rev: 1.36) of mpasmx and from the gputils source package (rev: svn 1308). The mpasmx is included in the MPLAB X.