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ROM
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Common
SFRs
Features Configuration Bits RAM map SFR map
PIC16F84A
CONFIG (address:0x2007, mask:0x3FFF, default:0x3FFF)
FOSC -- Oscillator Selection bits (bitmask:0x0003)
FOSC = LP 0x3FFC LP oscillator.
FOSC = XT 0x3FFD XT oscillator.
FOSC = HS 0x3FFE HS oscillator.
FOSC = EXTRC 0x3FFF RC oscillator.
WDTE -- Watchdog Timer (bitmask:0x0004)
WDTE = OFF 0x3FFB WDT disabled.
WDTE = ON 0x3FFF WDT enabled.
PWRTE -- Power-up Timer Enable bit (bitmask:0x0008)
PWRTE = ON 0x3FF7 Power-up Timer is enabled.
PWRTE = OFF 0x3FFF Power-up Timer is disabled.
CP -- Code Protection bit (bitmask:0x3FF0)
CP = ON 0x000F All program memory is code protected.
CP = OFF 0x3FFF Code protection disabled.

This page generated automatically by the device-help.pl program (2017-05-13 09:29:46 UTC) from the 8bit_device.info file (rev: 1.36) of mpasmx and from the gputils source package (rev: svn 1308). The mpasmx is included in the MPLAB X.